Implemented a few more OpCodes. 0xDD19 next

This commit is contained in:
2026-04-20 01:19:47 +01:00
parent 1ccacb55d5
commit e53661ce8a
2 changed files with 44 additions and 1 deletions

View File

@@ -722,7 +722,7 @@ namespace Core.Cpu
case 0x14: DE.High = Inc8(DE.High); return 4; // INC D case 0x14: DE.High = Inc8(DE.High); return 4; // INC D
case 0x1C: DE.Low = Inc8(DE.Low); return 4; // INC E case 0x1C: DE.Low = Inc8(DE.Low); return 4; // INC E
case 0x1E: DE.Low = FetchByte(); // LD E, n case 0x1E: DE.Low = FetchByte(); // LD E, n
return 7; return 7;
case 0x24: HL.High = Inc8(HL.High); return 4; // INC H case 0x24: HL.High = Inc8(HL.High); return 4; // INC H
case 0x2C: HL.Low = Inc8(HL.Low); return 4; // INC L case 0x2C: HL.Low = Inc8(HL.Low); return 4; // INC L
case 0x2E: // LD L, n case 0x2E: // LD L, n
@@ -1666,6 +1666,30 @@ namespace Core.Cpu
SP = (ushort)((spHigh << 8) | spLow); SP = (ushort)((spHigh << 8) | spLow);
return 20; return 20;
case 0xA0: // LDI
// 1. Read byte from (HL)
val = _memory.Read(HL.Word);
// 2. Write byte to (DE)
_memory.Write(DE.Word, val);
// 3. Increment memory pointers, Decrement byte counter
HL.Word++;
DE.Word++;
BC.Word--;
// 4. Update Flags
// Preserve S (0x80), Z (0x40), and C (0x01).
// H (0x10) and N (0x02) are forcefully reset to 0.
AF.Low &= 0xC1;
// P/V Flag (Bit 2) is set to 1 if BC is not 0 after the decrement
if (BC.Word != 0)
{
AF.Low |= 0x04;
}
return 16;
case 0xB0: // LDIR case 0xB0: // LDIR
// 1. Read byte from (HL) // 1. Read byte from (HL)
val = _memory.Read(HL.Word); val = _memory.Read(HL.Word);
@@ -1935,6 +1959,10 @@ namespace Core.Cpu
_memory.Write((ushort)(address22 + 1), IX.High); _memory.Write((ushort)(address22 + 1), IX.High);
return 20; return 20;
case 0x23: // INC IX
// Increment the full 16-bit register. Do NOT touch AF.Low!
IX.Word++;
return 10;
case 0x24: // INC IXH case 0x24: // INC IXH
// Increment the high byte of IX and let the helper perfectly map the flags // Increment the high byte of IX and let the helper perfectly map the flags
IX.High = Inc8(IX.High); IX.High = Inc8(IX.High);
@@ -1963,6 +1991,10 @@ namespace Core.Cpu
IX.Word = (ushort)((ixHigh << 8) | ixLow); IX.Word = (ushort)((ixHigh << 8) | ixLow);
return 20; return 20;
case 0x2B: // DEC IX
// Decrement the full 16-bit register. The F register remains completely untouched.
IX.Word--;
return 10;
case 0x2D: // DEC IXL case 0x2D: // DEC IXL
IX.Low = Dec8(IX.Low); IX.Low = Dec8(IX.Low);
return 8; return 8;

View File

@@ -849,6 +849,11 @@ namespace Desktop
mnemonic = $"LD (0x{nn:X4}), IX"; mnemonic = $"LD (0x{nn:X4}), IX";
instructionLength = 4; instructionLength = 4;
} }
else if (ddOpcode == 0x23) // INC IX
{
mnemonic = "INC IX";
instructionLength = 2;
}
else if (ddOpcode == 0x24) // INC IXH else if (ddOpcode == 0x24) // INC IXH
{ {
mnemonic = "INC IXH"; mnemonic = "INC IXH";
@@ -871,6 +876,11 @@ namespace Desktop
mnemonic = $"LD IX, (0x{nn:X4})"; mnemonic = $"LD IX, (0x{nn:X4})";
instructionLength = 4; instructionLength = 4;
} }
else if (ddOpcode == 0x2B) // DEC IX
{
mnemonic = "DEC IX";
instructionLength = 2;
}
else if (ddOpcode == 0x2D) // DEC IXL else if (ddOpcode == 0x2D) // DEC IXL
{ {
mnemonic = "DEC IXL"; mnemonic = "DEC IXL";
@@ -1093,6 +1103,7 @@ namespace Desktop
mnemonic = $"LD SP, (0x{nn:X4})"; mnemonic = $"LD SP, (0x{nn:X4})";
instructionLength = 4; instructionLength = 4;
break; break;
case 0xA0: mnemonic = "LDI"; instructionLength = 2; break;
case 0xB0: case 0xB0:
mnemonic = "LDIR"; mnemonic = "LDIR";
instructionLength = 2; instructionLength = 2;